1. Field of the Invention
The present invention relates to a liquid crystal display device of active matrix mode driven by thin-film transistor and to a dielectric film usable in the liquid crystal display device.
2. Description of the Prior Art
Liquid crystal display device is widely used in applications as an image display device in various types of electronic devices such as thin-type television set, display for computer, portable terminal, etc. Most of the liquid crystal display devices are operated by a mode called active matrix mode. Specifically, there are provided thin-film transistor (TFT) to drive the liquid crystal for the pixels arranged in matrix form. As the types of TFT, amorphous silicon (a-Si; non-crystal silicon) TFT and polysilicon (poly-Si; polycrystal silicon) TFT are known.
The amorphous silicon TFT can be formed on a substrate with larger area at low cost, and this has been widely used in the liquid crystal display device since many years. On the other hand, the polysilicon TFT has higher operating speed than the amorphous silicon TFT and can be easily miniaturized, and it is suitable for the use in the liquid crystal display device operated at higher speed and for providing precise images. In recent years, with the propagation of high-performance liquid crystal display device, the demand on the polysilicon TFT has rapidly increased.
FIG. 1 is a circuit diagram of a conventional type liquid crystal display device of active matrix mode. In FIG. 1, a plurality of pixels 1 are arranged in matrix form on a substrate. In each of the pixels, there are provided a liquid crystal cell 3 with a pixel electrode 2, and a TFT 4 connected to the pixel electrode 2 and used for driving the liquid crystal cell. To a gate electrode of this TFT 4, a scan signal is supplied from a gate driver 5 via a gate wiring 6. To a source electrode of TFT 4, a data signal is sent from a source driver 7 via a source wiring 8.
In this way, the data signal is inputted to the pixel electrode 2 via TFT 4 selected by the scan signal. Each gate wiring 6 and each source wiring 8 are so arranged that these wirings are positioned around the pixel 1 to perpendicularly cross each other. Further, the drain electrode of TFT 4 is connected to the liquid crystal cell 3 and a storage capacitor 9, and a counter electrode of the storage capacitor 9 is connected to a common wiring 10. The storage capacitor 9 is used to maintain the voltage applied on the liquid crystal cell 3, and it is arranged in parallel to a liquid crystal capacitor by the liquid crystal cell 3.
FIG. 2 is a cross-sectional view to explain TFT structure in a conventional type liquid crystal display device of active matrix mode. In FIG. 2, a conventional type amorphous silicon TFT is shown as an example. In FIG. 2, a gate electrode 12 connected to the gate wiring 6 as explained in FIG. 1 is formed on a transparent substrate 11, for which glass is used as a suitable material, and a gate dielectric film 13 is formed to cover these components. A semiconductor film 14 is prepared on the gate electrode 12 to be superimposed on it, and a channel protective film 15 is prepared on the central portion.
In order that it is to be in contact with both ends of the channel protective layer 15 and with a part of the semiconductor film 14, an n+Si film is formed as a source electrode 16a and a drain electrode 16b, which are separated from each other on the channel protective film 15. On the source electrode 16, a metal film 17a is formed, which is to be turned to the source wiring 8 shown in FIG. 1. On the drain electrode 16b, a metal film 17b is formed, which connects the drain electrode 16b with the pixel electrode 2. Further, an interlayer dielectric film 18 is prepared to cover the source electrode 16a, the drain electrode 16b, and the metal films 17a and 17b. On the interlayer dielectric film 18, a transparent conductive film is formed, which is to be turned to the pixel electrode 2. This transparent conductive film is connected with the metal film 17b, which is connected with the drain electrode 16b via a contact hole 19 formed on the interlayer dielectric film 18 by patterning.
As described above, the interlayer dielectric film 18 is formed between the gate wiring 6 and the source wiring 8 on one side and the transparent conductive film on another side, which is to be turned to the pixel electrode 2. On the other hand, the pixel electrode 2 can be arranged to overlap on the gate wiring 6 and the source wiring 8. A structure as such is disclosed in the Patent Document 1, for instance. By such an arrangement, it is possible to improve the aperture ratio of the liquid crystal display device.
As the interlayer dielectric film 18, silicon nitride film (SiN; dielectric constant: approx. 8), silicon oxy-nitride (SiON; dielectric constant: approx. 4.5), and silicon oxide film (SiO; dielectric constant: approx. 4), etc. are known. These films are deposited by chemical vapor deposition (CVD) method. The film thickness is about 500 nm.
However, dielectric constant of these interlayer dielectric films have dielectric constant as high as 4 or more. This means that electric capacity between the pixel electrode 2 and the gate wiring 6 or the source wiring 8 is high, and this causes a problem. To solve this problem, a method is proposed, which uses a dielectric film with dielectric constant lower than that of the interlayer dielectric film as the interlayer dielectric film 18.
For instance, the Patent Document 2 describes a method, in which a SiOF film with fluorine added to a silicon oxide film (dielectric constant: approx. 3.5) or a SiCO film with carbon added on silicon oxide film (dielectric constant: approx. 3) is deposited by CVD method, and this is used as the interlayer dielectric film. By this method, electric capacitance generated on the interlayer dielectric film 18 can be reduced, and power consumption of the wirings of the liquid crystal display device can be decreased.
Another problem of the method to form the interlayer dielectric film 18 by CVD method is that the surface of the interlayer dielectric film 18 reflects surface irregularities of the underlying TFT. As a result, similar surface irregularities occur on the pixel electrode 2, which is prepared on the interlayer dielectric film 18, and this causes inadequate skip-over of the pixel electrode or poor orientation of the liquid crystal molecules. This results in the increase of pixel defects in TFT or poor image visibility.
To solve this problem, a method is proposed in the Patent Document 3. According to this method, chemical mechanical polishing (CMP) is applied for flattening after the interlayer dielectric film 18 has been thickly deposited, and the graded step in the underlying layer is eliminated. As another method for flattening, the Patent Document 4 discloses a method, by which a coating type film with low dielectric constant, e.g. hydro-silsesquioxane film (HSQ; dielectric constant: approx. 3) or methyl-silsesquioxane film (MSQ; dielectric constant: approx. 3), is used.
FIG. 3 is a cross-sectional view of TFT structure of the liquid crystal display device when the graded step in the underlying layer is flattened in the interlayer dielectric film 18 according to the conventional method as described above. The same functional component as in FIG. 2 is referred by the same symbol in FIG. 3. FIG. 3 shows that the interlayer dielectric film 18 has a flattened surface. As shown in FIG. 3, by using the interlayer dielectric film with low dielectric property and flatness, it is possible to reduce power consumption and defects of the liquid crystal display device and to improve image visibility.
On the other hand, when the interlayer dielectric film as given above is used, the number of processes to form the interlayer dielectric film 18 is increased, and this leads to the higher cost for the manufacture of the liquid crystal display device. That is, longer time is required for deposition of thick interlayer dielectric film by CVD method. Also, to carry out the CMP process on a substrate with large area, it is difficult to flatten uniformly. Further, the longer time is required for the process.
In case a coating type film with low dielectric constant is used, CMP process is not needed, while it is necessary to have complicated process to form the contact hole 19 for electrically connecting the pixel electrode 2 with the drain electrode 16b. In short, this means that a process is required, in which photo-patterning is performed by using photo-resist, and the pattern of the contact hole is transferred to the interlayer dielectric film 18 by etching. Further, the photo-resist must be peeled off, which is not needed any more.
To solve the problem of the increase of the number of processes to prepare the interlayer dielectric film 18, a method to use a photosensitive interlayer dielectric film is disclosed in the Patent Document 5. According to this method, by using photosensitive acrylic film (dielectric constant: approx. 3.5) as the interlayer dielectric film 18, there is no need to have the processes of etching and photo-resist peeling-off. This makes it possible to reduce the manufacturing cost of the liquid crystal display device.
However, the photosensitive acrylic film has a problem in that it has low heat-resistant property. Heat-resisting temperature of the photosensitive acrylic film is 250° C. or lower. In the process to manufacture the photosensitive acrylic film, after the processes of coating and photo-patterning, thermal curing is performed at the temperature of 200° C. to 250° C., and an interlayer dielectric film of 1.5-3 μm in thickness is obtained. Then, the pixel electrode and the orientation film are formed on the interlayer dielectric film. During this process, the temperature must be set to a value of 250° C. or lower.
When the photosensitive acrylic film is processed by heat treatment at the temperature higher than the heat-resisting temperature, it is easily colored, and this is not suitable as the interlayer dielectric film, which requires high optical transmissivity. Even when the heat treatment process is optimized so that coloring of the photosensitive acrylic film does not occur, optical transmissivity of the material of the photosensitive acrylic film is by about 5% to 10% lower than that of the CVD film of the siloxane type materials such as HSQ film or MSQ film as described above. When the optical transmissivity of the interlayer dielectric film is low, the transmissivity of the liquid crystal display device is also low. This means that image visibility is lower.
To solve the problem of low heat-resistant property or low optical transmissivity of the photosensitive acrylic film, the Patent Documents 6-8 disclose different methods to use photosensitive interlayer dielectric film. FIG. 4 is a flow chart to explain a process to prepare a conventional type dielectric film using poly-silazane. According to this method, a raw material solution containing poly-silazane and photosensitive compound is coated as the raw material of the dielectric film (Process 1; hereinafter referred as “P-1”, and so on). Through the processes of prebaking (P-2), pattern exposure (P-3), development (P-4), overall exposure (P-5), humidification (P-6), and thermal curing (P-7), the siloxane dielectric film is prepared.
Here, in the processes of overall exposure (P-5), humidification (P-6), and thermal curing (P-7), silazane bonding (Si—NH—Si) is completely converted to siloxane bonding (Si—O—Si) via silanol (Si—OH).
The dielectric film thus obtained has heat-resistant property to temperature of 500° C. or more. When this is used as the interlayer dielectric film in the image display device, it has a property resistant enough to the processing temperature needed in the subsequent process after the process of the interlayer dielectric film. If organic silazane, which has organic group in side chain of poly-silazane, is used as raw material, organic siloxane dielectric film (dielectric constant: approx. 3) can be obtained, and low dielectric property can be attained.
The Patent Document 7 discloses a method to use inorganic poly-silazane having hydrogen group in side chain of poly-silazane as raw material. This material is turned to inorganic siloxane dielectric film (dielectric constant: approx. 4) after thermal curing. As a result, electric capacitance of the wirings increases compared with the case where organic siloxane dielectric film is used.
[Patent Document 1] JP-A-58-172685
[Patent Document 2] JP-A-2002-353465
[Patent Document 3] JP-A-2004-133239
[Patent Document 4] JP-A-2003-324201
[Patent Document 5] JP-A-2000-181069
[Patent Document 6] JP-A-2000-243834
[Patent Document 7] JP-A-2002-72504
[Patent Document 8] JP-A-2004-53838